SPS 2019

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International Semiconductor Panel Symposium (SPS) 2019



December 17 & 18, 2019
Nanhai Jiayia International Hotel
Foshan China
No.55 Middle Bo'ai Road (Bo'ai Zhong Lu),
Shishan Town Nanhai District Foshan
528225 China

For the first time, Guangdong Semiconductor Intelligent Equipment and System Integration Innovation Center (FZX), TestConX,  Hong Kong Science and Technology Research Institute (ASTRI), and MicroElectronics Packaging and Test Engineering Council (MEPTEC) co-organize the International Semiconductor Panel Symposium (SPS 2019) focused on Panel Level Advanced Packaging & System Integration Technology. This symposium is an unparalleled gathering of the leading executives from around the world discussing the timeliest issues, challenges and opportunities. The unique single-meeting event will take place in one of the most dynamic places in the field of advanced packaging: FoShan , Guangdong Province, PR China, from December 17 to 18, 2019.



Tuesday December 17, 2019

8:00

Registration Opens


9:00

Welcome & Short Courses

 
 

Welcome Speech

Dr Cui Chengqiang
Guangdong Semiconductor Intelligent Equipment and System Integration Innovation Center (FZX)

 

 
 

The Opening Ceremony of Guangdong Semiconductor Intelligent Equipment and System Integration Innovation Center

 

 
 

Launch of the Large PLFO assembly Line


9:40

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From Wafer to Panel Level Packaging

Tanja Braun
Fraunhofer IZM Berlin

10:40

Networking Tea Break


11:00

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Stress Analysis and Reliability Management in Advanced Packaging
先进封装中应力分析及可靠性管理

Xuejun Fan
IEEE Distinguished Lecturer


12:00

Lunch  and Networking

For paid short course atttendees and presenters.


13:30

Keynote


 
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Keynote: Challenge on New Materials of Electronic Packaging

Johan Liu
Royal Swedish Academy of Sciences


 
 

Introduction of Guangdong Semiconductor Intelligent Equipment and System Integration Innovation Center (FZX)

Dr. Cui Chengqiang
Guangdong Semiconductor Intelligent Equipment and System Integration Innovation Center (FZX)


15:00

Tea Break


15:20

Session 1


 
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SEMI Standards: Update on Panel Level Packaging Standardization

Isadora Jin
SEMI


 
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High Frequency Power Converters with 3D Package-embedded Inductors

Dr. Ziyang GAO
Hong Kong Science and Technology Research Institute (ASTRI)


 
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Challenge on Electronic Packaging

Tonglong Zhang / 张童龙
HUAWEI- HiSilicon


 
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Recent Endeavors on WLP/PLP

Dr. Thorsten Meyer
Infineon


 
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Wet Coating Technique for Panel Level Package

Koichi Jono
SCREEN, Finetech Solutions Co., Ltd.


18:00

Networking Reception

For all attendees

Wednesday December 18, 2019


8:00

Registration Opens


8:30

Session 2


 
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Development of eSiFO Gat Huatian

Dr. Yu Daquan
HuaTian Scientific Co


 
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Advanced Material Development

Toshihisa Nonaka
Hitachi Chemicals


 
 

High Performance Base Materials for IC Substrate & Packaging

Yang Zhongqiang
SYTECH



 
 

Materials - to be announced

Dr Yuan Mingjun
GUANGHUA TECHNOLOGY



10:30

Tea Break


10:45

Session 3


 
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PLP Development in World Wide

Santosh Kumar
Yole Development



 
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Applications of Micro-Analysis in the
Electronics Industry for Failure Analysis -
From Material to Device

Lin Nan
EDAX



 
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Exploring the Regional Semiconductor Industry Ecology in Post-Moore Era

Wang Huilian/王汇联
Xiamen Semiconductor Investment Group Co., Ltd



12:00

Lunch and Networking


13:35

Session 4

 
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FOPLP Solution for Cu
RDL Formation

Dr. Richard Tsai

MANZ



 
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PLP Development

Farhang Yazdani

BroadPak


 
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Test Efficiency of Panel Level Packaging

Kirk Pitta

Teradyne



15:50

Adjourn


16:00

Optional Offsite Tour of FZXTour of FZX Visit GuangDong Semiconductor Intelligent Equipment and System Integration Innovation Center

Cai Kunceng
Guangdong Semiconductor Intelligent Equipment and System Integration Innovation Center (FZX)



Program subject to change without notice

For additional information please contact sps2019@testconx.org